Startup Intelligence · Startup Spotlight · October 31, 2026
Kepler Computing: The Startup Rethinking Memory Architecture for the AI Era — ferroelectric 3D memory, the HBM bottleneck, funding, manufacturing partners, and what it would take to become commercially competitive.
Memory bandwidth and supply have become the binding constraint on AI infrastructure. Kepler Computing, a California startup founded in 2018, emerged from multi-year stealth in September 2026 with a ferroelectric, 3D-integrated memory approach aimed at the HBM and SRAM bottlenecks — and with claims that its process can run on mature-node fabs without extreme ultraviolet (EUV) lithography.
This profile examines the technology thesis, funding, manufacturing plan, and competitive context. Performance and density figures are company claims unless independently verified; products remain at the sampling and pre-production stage.
1. Company Overview
Kepler Computing is a privately held semiconductor company focused on next-generation AI memory. It was founded in 2018 and is based in the San Jose / Moraga, California area. After roughly seven to eight years in stealth, it publicly described its technology and commercialization path in September 2026.
Leadership includes co-founder and CEO Debo Olaosebikan; co-founder and CTO Sasikanth (Sasi) Manipatruni; co-founder Rajeev Dokania (engineering/hardware); co-founder Amrita Mathuriya; and co-founder and chief science officer Ramesh Ramamoorthy. Several co-founders have prior experience at Intel on advanced logic, materials, and architecture. The company website positions the firm under “AI’s new memory,” with sampling targeted for 2026 and production for 2027.
2. Founding Vision
The problem Kepler targets is structural: AI accelerators are increasingly limited by how fast data can move in and out of memory, and by how much high-bandwidth memory can be manufactured. Conventional HBM depends on advanced DRAM processes, complex stacking and packaging, and capacity that is constrained and expensive. On-chip SRAM is fast but low-density and costly in area.
Kepler’s stated thesis is that a combination of ferroelectric materials and 3D integration can deliver bandwidth-per-watt closer to SRAM while offering capacity beyond what conventional SRAM (and, on company claims, beyond current HBM) provides — and that this can be manufactured without depending on EUV-limited leading-edge DRAM lines. The original plan emphasized SRAM first; after the post-2022 surge in HBM demand, the company accelerated a parallel HBM-oriented roadmap.
3. Technology Architecture
Public descriptions center on ferroelectric memory (FeRAM-class behavior: polarization state rather than pure charge storage on a conventional DRAM capacitor) combined with 3D stacking / heterogeneous integration. Company and secondary reporting describe ferroelectric capacitors (including hafnium-zirconium-oxide-related composites in some accounts) and stacking of memory structures relative to logic, with claims of reduced thermal overhead versus conventional 3D approaches.
A central process claim is manufacturability on mature nodes (illustratively 28 nm-class lines) after fab conversion, without EUV. CTO Sasi Manipatruni has said the team iterated through dozens of material formulations (reported as 35 composites) before selecting a class believed to be scalable. Peer-reviewed work cited by the company argues the stack can be built on existing CMOS flows.
These remain technology and process claims. Independent third-party characterization of production silicon is not yet available in the public record reviewed for this profile.
4. AI Memory Innovation
Why this matters for AI: many inference and training workloads are memory-bound. HBM supplies high bandwidth next to the accelerator but is supply-constrained and capital-intensive. SRAM is the gold standard for energy efficiency and latency but does not scale in capacity. Kepler positions its products as addressing both axes — an HBM-oriented path and an SRAM-oriented path — with company claims of bandwidth-per-watt approaching SRAM and capacity multiples beyond conventional SRAM (and, in some company statements, beyond HBM).
Company materials also frame the opportunity as “more intelligence per fab”: if mature-node capacity can be converted to high-value AI memory, supply can expand without waiting solely for new EUV-intensive DRAM fabs. That is a manufacturing thesis as much as a device thesis.
5. Products & Technology Status
Status as of late 2026: Pre-commercial. The company states sampling in 2026 and production ramp in 2027. Reporting cites on the order of ~2,000 wafers processed to date. First HBM-oriented samples were expected later in 2026; volume production is planned first at GlobalFoundries’ Singapore facility (2027), with U.S. manufacturing targeted for 2028.
There is no publicly documented commercial product shipment, customer design-win disclosure at scale, or independent benchmark of a shipping part. Performance multiples (e.g., matrix-multiply throughput or capacity claims versus HBM/SRAM) should be treated as company-stated targets or internal figures until third-party validation exists.
6. Manufacturing Strategy
GlobalFoundries is both a manufacturing partner and an investor (reported $50 million). Testing has been described at GF facilities in Singapore and Vermont. Kepler has claimed conversion of a mature (e.g., 28 nm) line for its process in roughly eight months versus a multi-year greenfield timeline for advanced DRAM. U.S. production in 2028 is linked to domestic manufacturing goals and to Commerce Department support.
Scalability hinges on yield, endurance, retention, and consistency of the ferroelectric stack at volume — historically the hardest part of bringing alternative memories to market — and on whether customers will qualify a non-standard memory interface and reliability profile for AI systems.
7. Funding & Investors
At exit from stealth, Kepler was widely reported to have raised approximately $468 million in private funding. Named strategic and financial backers in contemporaneous reporting include GlobalFoundries, Intel Capital, AMD Ventures, Baillie Gifford, and Gates Frontier (Bill Gates). Additional earlier-stage investors appear in private-market databases.
Separately, the U.S. Department of Commerce has committed up to $245 million in proposed support under CHIPS-related programs to develop high-performance AI memory enabled by 3D and ferroelectric technologies in the United States. That commitment is government support, not private equity, and is subject to program terms and milestones.
Aggregate private-raise figures in third-party databases sometimes differ (higher cumulative totals in some trackers); this profile uses the ~$468 million figure emphasized in primary exit reporting and treats the Commerce commitment as additional public support.
8. Market Opportunity
AI infrastructure spend has made HBM one of the scarcest and highest-value components in the semiconductor stack. Leading suppliers (SK hynix, Samsung, Micron) report multi-year sold-out conditions and elevated margins. Any architecture that can add qualified high-bandwidth capacity — especially if it can use existing mature-node fabs — addresses a real economic bottleneck.
That opportunity is not the same as achieved revenue. Kepler’s addressable market depends on customer qualification, software/hardware ecosystem fit, reliability, and cost at volume. Projected AI memory demand should not be read as Kepler’s booked sales.
9. Competitive Landscape
Incumbent HBM: SK hynix, Samsung, and Micron dominate commercial HBM. They control process, packaging, customer qualification, and long-term supply agreements. Any alternative must clear the same reliability and ecosystem bars or find niches (e.g., inference-specific, lower-cost tiers) where a different trade-off is acceptable.
Alternative memories and 3D approaches: Other startups and research efforts pursue MRAM, ReRAM, ferroelectric variants, high-bandwidth flash (HBF) concepts and novel stacking. Kepler’s differentiation is the combination of ferroelectric materials, claimed mature-node manufacturability, and dual HBM/SRAM positioning with strategic foundry and investor alignment.
Incumbents also invest heavily in HBM4/HBM4E and advanced packaging; a startup does not compete only on a single generation but against a multi-year roadmap and entrenched customer relationships.
10. Business Model
Near-term path: develop, sample and qualify memory products with hyperscalers, accelerator vendors and systems companies; manufacture via foundry partners (GlobalFoundries and potentially others); sell chips or modules into AI systems. Strategic investors (Intel Capital, AMD Ventures, GF) create a natural path to design engagement but do not guarantee design wins.
Longer-term options could include IP licensing or deeper integration with logic partners. No public revenue run-rate has been disclosed; the company remains in the pre-revenue or early sampling phase relative to commercial AI memory markets.
11. Challenges & Risks
Manufacturing and yield — Alternative memories historically struggle at volume; ferroelectric endurance, retention and uniformity must hold at scale.
Customer qualification — AI systems demand proven reliability; displacing or complementing HBM requires multi-year qualification cycles.
Claim vs. demonstrated performance — Bandwidth, capacity and power figures are company-stated until independent silicon is measured in the field.
Capital and timeline — Sampling in 2026 and production in 2027–2028 leave limited room for process setbacks before competitors advance HBM4/HBM4E supply.
Ecosystem lock-in — Software, controllers and packaging ecosystems are built around incumbent HBM; integration cost can delay adoption even if device metrics are attractive.
12. Strategic Outlook
Kepler is one of the better-capitalized attempts to attack the AI memory bottleneck with a non-standard materials and stacking approach, backed by strategic semiconductor investors and U.S. industrial-policy support. The commercial question is not whether the physics of ferroelectrics or 3D integration is interesting — it is whether the company can deliver qualified, high-yield products on the stated 2026–2028 timeline at a cost and reliability point that hyperscalers and accelerator vendors will adopt.
Success would expand the set of viable AI memory sources and reduce sole dependence on EUV-intensive HBM supply. Failure modes look like those of prior alternative-memory efforts: promising demos that do not cross the volume-yield and qualification barriers. The next 12–24 months of sampling, customer feedback and first production lots will determine which path applies.
Sources & verification note
Primary references include Kepler’s public site (keplercompute.com), Wired’s September 2026 exit coverage, EE Times interviews with company leadership, and contemporaneous reporting on funding and Commerce Department support. Funding amounts and timelines follow those disclosures. Performance and capacity multiples are labeled as company claims. No commercial revenue or independent product benchmarks are asserted.
Related CODEW coverage
• DRAM vs. NAND vs. HBM — Technology Fundamentals
• The Global Memory Semiconductor Race — Special Report
• SK hynix Company Analysis — HBM competitive context
• CXMT Company Deep Dive — alternative memory capacity buildout
Editorial Note
This Startup Spotlight is for informational purposes. It is not investment advice. Startup technology claims, timelines, and funding figures can change; readers should verify current status against primary company and regulatory disclosures.
THE CODEW · Startup Intelligence · Startup Spotlight · October 31, 2026
Reviewed by Erwin Castro
on
Saturday, October 31, 2026
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