Nvidia Pushes Custom HBM Toward TSMC Base Dies, Besi's Hybrid Bonding Orders Nearly Double, Terafab Accelerates Equipment Deliveries, Singapore Deepens Its Chip Ecosystem, and Samsung and Intel Face an Earnings Test on October 29
The AI Chip Advantage Is Shifting From Compute to Memory and Packaging
The most consequential semiconductor development this week is not a faster GPU. It is a structural change in how memory is designed and sold. Reports indicate that Nvidia has asked Samsung, SK hynix and Micron to produce custom HBM — designated NVHBM — using TSMC's 3-nanometer process for the base die, with sixth-generation DRAM for the core die. Samsung has reportedly accepted the requirement after an internal review, while planning to retain in-house production for standard HBM and custom products for other customers. Samsung declined to comment, saying it does not discuss customer matters.
The strategic implication is significant. If the logic base die of HBM moves to TSMC's advanced process, then memory is no longer a standalone component — it becomes a co-designed system element that blends DRAM, logic, and customer-specific IP. That changes who holds pricing power, who controls the roadmap, and how much inventory flexibility memory makers retain. From HBM4 onward, chips optimized for one customer cannot simply be sold to another; if they fall short of that customer's criteria, they are treated as defective even when physically functional.
Two supporting developments sharpen the picture. Besi reported Q3 2026 orders of €342.6 million, up 17% sequentially and 96% year over year, beating the €298 million consensus, with hybrid bonding orders more than doubling year-to-date versus all of 2025. And Elon Musk said ASML and other equipment suppliers have expedited deliveries for the Tesla–SpaceX Terafab project, targeting volume production in Q3 or Q4 2028 — a schedule analysts describe as aggressive given the project has no prior semiconductor manufacturing experience. The through-line: the constraint on AI chips is moving from lithography to memory, packaging, and the industrial base that supports them.
Semiconductor at a Glance
| Development | Companies | Category | Status |
|---|---|---|---|
| Custom NVHBM with TSMC 3nm base die | Nvidia, Samsung, SK hynix, Micron, TSMC | HBM / advanced memory | Reported — Samsung declined comment |
| Q3 orders €342.6M, +96% YoY | Besi | Hybrid bonding equipment | Reported Oct 22 — confirmed |
| ASML expedites Terafab equipment | Tesla, SpaceX, ASML | New fab/capacity | Confirmed by Musk — target 2028 |
| Singapore fab and packaging expansion | Micron, GlobalFoundries, UMC, VSMC, TOPPAN/Broadcom | Supply chain diversification | In progress — multi-year |
| Samsung foundry prices +15% | Samsung | Foundry pricing | Reported Aug — in effect |
| Q3 earnings on October 29 | Samsung, Intel | Earnings | Upcoming — not yet reported |
Signal summary: Only two of these six developments are confirmed by the companies involved at the level of specific commercial terms. The custom HBM story rests on reporting that Samsung has declined to confirm. The earnings event has not happened. The pattern is that the semiconductor industry's most important shifts are often visible in supply-chain reporting before they are visible in company disclosures.
The Stories Shaping Semiconductors
Nvidia Wants Custom HBM With TSMC Base Dies. That Reshapes the Memory Business.
What happened: Reports indicate Nvidia has asked Samsung, SK hynix and Micron to produce NVHBM — a custom high-bandwidth memory — using TSMC's 3nm process for the base die and sixth-generation DRAM for the core die. Samsung reportedly accepted after an internal review, while intending to keep in-house production for standard HBM and custom products for other customers. Samsung declined to comment on customer matters.
Technology implications: HBM is built by stacking DRAM core dies on top of a logic base die that manages the interface to the GPU. Historically, memory makers produced the base die themselves on mature processes. Moving the base die to TSMC's 3nm changes the component's character: the base die can now carry customer-specific IP, a RISC-V architecture, and more complex logic, turning HBM from a storage component into a system-level part with compute capability.
Business and competitive impact: Three consequences follow. First, inventory flexibility collapses. Custom HBM built to one customer's specification cannot be resold to another; physically functional chips that miss the customer's criteria are treated as defective. Second, TSMC becomes embedded in the memory supply chain in a way it was not before, gaining influence over a component it historically did not manufacture. Third, pricing power shifts toward whoever controls the specification — and that is the accelerator designer, not the memory maker. SK hynix is already signaling that it intends to push customization beyond HBM into NAND and high-bandwidth flash, suggesting memory suppliers see customization as a way to defend margin rather than simply comply.
Editorial note: Samsung's decision not to comment means the arrangement is reported, not confirmed. Treat the TSMC 3nm base-die requirement as reported pending company confirmation. What comes next: Watch for formal HBM4 qualification announcements and whether Micron and SK hynix confirm the same base-die arrangement.
Besi's Orders Nearly Doubled. But Hybrid Bonding's HBM Moment Hasn't Arrived Yet.
What happened: BE Semiconductor Industries reported Q3 2026 order intake of €342.6 million ($385.2 million) on October 22 — up 17% sequentially and 96% year over year, against a €298 million Visible Alpha consensus. The 12-month rolling backlog reached €1.2 billion, and hybrid bonding orders more than doubled year-to-date compared with all of 2025, with adoption widening across memory and logic.
Technology implications: Hybrid bonding joins stacked chips directly, copper-to-copper, without solder bumps. That delivers faster, more energy-efficient connections than conventional stacking — which matters enormously for HBM, where the number of stacked dies is rising and power per bit is becoming a constraint.
The caveat that matters: Strong equipment orders are not the same as high-volume customer adoption. Besi's Q4 revenue guidance is broadly flat at €283.4 million ±5%, below the €291.5 million LSEG consensus. CEO Richard Blickman attributed the flat outlook to when customers' production lines would be ready, not to cancellations or pushouts.
The competitive flashpoint: Besi shares fell after research firm SemiAnalysis suggested ASML might be developing a rival hybrid bonding tool. Blickman explicitly rejected that: "We do not view ASML as a hybrid bonding competitor", adding that the two companies collaborate on placement precision and that ASML's interest lies in 3D transistor stacking inside the chip over the next decade. Besi also announced a €100 million share buyback.
The unresolved question: Investors have worried that memory makers such as Micron and SK hynix may be slow to adopt hybrid bonding for HBM. Besi shares have roughly halved since a June peak, and Blickman said only that pressure to make hybrid bonding ready for high-volume memory production "is only increasing." That is a statement of expectation, not evidence of adoption.
Editorial note: Orders are confirmed by the company. The pace of hybrid bonding adoption in HBM remains unproven.
ASML Is Expediting Equipment for Terafab. The 2028 Target Is Still the Hard Part.
What happened: On SpaceX's Q3 earnings call, Elon Musk said ASML and other key chipmaking equipment suppliers have expedited deliveries for the Tesla and SpaceX Terafab project, targeting volume chip production by Q3 or Q4 of 2028. Test chips are targeted for mid-2027. Musk called the dates "very aggressive" and thanked suppliers for accelerating. An ASML spokesperson declined to comment.
The scale being proposed: Industry estimates put Terafab at $20–25 billion in cost, with a planned full-capacity output of 1 million wafers per month — roughly 70% of TSMC's current global capacity. The stated purpose is to fill a shortfall in cutting-edge AI processors from suppliers including TSMC.
Why the schedule deserves scrutiny: Building a viable semiconductor manufacturing operation is not primarily a capital problem — it is a process integration, yield, talent, and supplier ecosystem problem. A fab needs lithography tools, process recipes qualified across hundreds of steps, defect-density learning curves measured in quarters, and a trained workforce. Terafab is proposed by two companies with no prior semiconductor manufacturing experience. One analyst cited by Yahoo Finance expects mass production may take until 2030 rather than 2028.
What is confirmed versus projected: Musk's statement that suppliers have expedited deliveries is confirmed by him; ASML has not confirmed it. The 2028 production target is a target, not evidence of production capability. The 1 million wafers per month figure is a planning ambition.
Why it matters anyway: Even if Terafab slips, the project signals that vertically integrated technology companies are prepared to fund captive semiconductor capacity when they believe external supply is insufficient. That is a structural threat to the foundry model over a multi-year horizon — and a reminder that AI demand is now large enough to justify considering fabs that would have seemed implausible five years ago.
Singapore's Chip Bet Is About Packaging and Talent, Not Just Fabs
What happened: Singapore has accumulated a substantial pipeline of semiconductor investment across fabrication, advanced packaging, and R&D. Micron has committed $24 billion to expand NAND capacity in Singapore and broke ground in January 2025 on a $7 billion advanced packaging facility for high-bandwidth memory. GlobalFoundries committed $4 billion to expand specialty chip capacity. UMC is investing $5 billion and has expanded its Fab 12i P4 cleanroom with a focus on silicon photonics.
The VSMC joint venture between Vanguard and NXP — a $7.8 billion facility — opened its first 12-inch fab on September 28, with risk production at 40nm to 130nm nodes, volume production expected in Q1 2027 and 44,000 wafers per month targeted by 2029. And Advanced Substrate Technologies, a TOPPAN–Broadcom joint venture, opened an advanced packaging substrate plant in Singapore on September 29, giving the country the ability to manufacture a critical AI chip component domestically.
Why it matters: Singapore accounts for roughly 10% of global semiconductor output and 20% of semiconductor equipment production, according to the Economic Development Board. The current investment wave is not concentrated in leading-edge logic — it is concentrated in memory, specialty nodes, advanced packaging and substrates. That is precisely the part of the supply chain where AI demand is creating new constraints, and where geographic concentration in Taiwan and South Korea is a strategic vulnerability.
The nuance: Diversification is about more than building fabs. Packaging capacity, substrate supply, talent pipelines and supplier ecosystems all determine whether a fab can operate economically. Singapore's advantage is that it already has a dense supplier base — 14 global semiconductor companies across four wafer fab parks — plus a S$800 million research flagship led by A*STAR and EDB. What to watch: Whether Micron's HBM packaging facility reaches volume production on schedule, and whether the VSMC fab's Q1 2027 volume ramp holds.
Samsung and Intel Report on October 29. Here Is What the Results Will Test.
What is happening: Samsung Electronics will release Q3 2026 results on October 29 at 10:00 a.m. Korea Standard Time, with a conference call and pre-submitted investor questions (RNS). Intel will report Q3 2026 results after market close the same day. Analysts currently expect Intel revenue of roughly $16.44 billion and EPS of $0.39, with options pricing implying a 10.9% move in either direction. What Samsung's results will test: Three things. First, memory pricing — whether HBM and conventional DRAM price increases are flowing into margins as the custom HBM transition raises complexity. Second, foundry progress — Samsung has raised prices on advanced contract manufacturing by up to 15% for new orders, with SF4 up 10–15% in China and the US, SF5 up 10–15%, and SF8 up nearly 10%. Investors will want evidence that higher pricing is translating into foundry profitability rather than just revenue. Third, HBM qualification — whether Samsung has secured meaningful custom HBM business beyond the reported Nvidia arrangement.
What Intel's results will test: Whether the combination of traditional CPU business and foundry transition is producing a credible path forward. Intel has lost 29% over the past month as tech stocks came under pressure, and the options market is pricing a double-digit move — a sign that conviction is low and the outcome is genuinely uncertain.
Why both matter together: Samsung and Intel are the two most plausible alternative suppliers to TSMC at advanced nodes. If both show improving foundry economics, the case for supply-chain diversification strengthens. If both disappoint, TSMC's position looks more entrenched than ever — and the pricing pressure on the rest of the industry intensifies.
Editorial note: These results have not been released. This is a preview, not a report of outcomes. Figures cited are analyst consensus, not company guidance.
Also in Semiconductors
Samsung foundry pricing, revisited: The up-to-15% increases reported in August apply to new orders and are now in effect. Samsung produced roughly 7% of global foundry revenue in Q1 2026 against TSMC's more than 70%, per Counterpoint. With TSMC's leading-edge capacity booked out, Samsung has more leverage to raise prices — and analysts suggest the foundry unit could turn profitable as early as next year if pricing holds.
AI chip supply alliances widen: AMD CEO Lisa Su reportedly met with SK hynix CEO Kwak Noh-jung and Samsung DS division chief Jun Young-hyun in early October to expand HBM and supply-chain collaboration. The pattern of accelerator designers negotiating directly with multiple memory makers reinforces the shift toward customer-specified memory.
Korean market volatility: Foreign investors sold a net 18.115 trillion won of KOSPI shares between October 1 and 20, with Samsung accounting for 4.075 trillion won and SK hynix 9.966 trillion won of the outflows. That selling pressure is a useful backdrop for the October 29 results — expectations have already been marked down.
HBM4E thermal race: Samsung and SK hynix are both working on HBM4E heat dissipation, with SK hynix's iHBM placing thermally conductive but electrically insulating material around the heat-concentrated D2D PHY. Reports suggest the AI interposer layer may expand to 40 times current complexity, adding another packaging constraint.
Competitive Implications: Who Gains, Who Loses
The custom HBM transition redistributes advantage across the semiconductor stack. Mapping the shifts makes the stakes clear.
| Player | Effect | Why |
|---|---|---|
| Nvidia | Gains | Controls the specification; memory becomes an extension of its accelerator design |
| TSMC | Gains | Enters the HBM supply chain through 3nm base dies, expanding its addressable market |
| Besi | Gains conditionally | Hybrid bonding is required for denser stacking, but HBM adoption pace is unproven |
| Memory makers | Mixed | Higher value per unit but lower inventory flexibility and loss of base-die control |
| Samsung foundry | Gains conditionally | Pricing leverage from TSMC capacity constraints; execution still unproven |
| Intel foundry | Unresolved | Credible alternative if execution improves; Oct 29 results are a key data point |
The structural shift. When memory is customized to a specific accelerator, the boundary between compute and memory blurs. That benefits whoever defines the system architecture — currently Nvidia — and whoever manufactures the logic that connects them — currently TSMC. Memory makers retain scale and process expertise, but they lose the ability to allocate inventory opportunistically across customers. That is a meaningful change in bargaining position, even if revenue per unit rises.
What to Watch Next
- Samsung and Intel Q3 results on October 29. Samsung at 10:00 KST; Intel after market close. Watch memory pricing, foundry margins, HBM qualification and Intel's foundry losses.
- HBM4 qualification announcements. Whether SK hynix and Micron confirm the TSMC 3nm base-die arrangement for NVHBM, and whether Samsung formally acknowledges it.
- Besi's Q4 revenue against guidance. Flat guidance of €283.4 million ±5% needs to hold; the more important signal is whether hybrid bonding orders convert into HBM production tool revenue.
- Terafab's mid-2027 test chip milestone. The first concrete checkpoint. If test chips slip, the 2028 volume target becomes implausible.
- Micron's Singapore HBM packaging facility. Volume production timing for the $7 billion facility will indicate whether packaging capacity is actually expanding in line with AI demand.
- VSMC's Q1 2027 volume ramp. The first major 12-inch specialty fab to come online in Singapore in this cycle; a useful test of the diversification thesis.
- Samsung foundry pricing durability. Whether the 10–15% increases hold as TSMC brings additional capacity online, or unwind if demand softens.
The larger pattern connecting these stories is that the AI chip race has moved from a lithography contest to a systems-integration contest — and the companies that win will be the ones that control how compute, memory and packaging fit together, not the ones with the smallest transistor.
That is the common thread across all five stories. Custom HBM with TSMC base dies is a packaging and integration decision. Besi's hybrid bonding orders are a packaging and integration signal. Terafab is an attempt to vertically integrate manufacturing. Singapore's investment wave is concentrated in packaging and substrates rather than leading-edge logic. And the Samsung–Intel earnings test is fundamentally about whether the two leading alternatives to TSMC can execute at advanced nodes.
The evidence gap is the story's most important feature. Four of the five developments in this edition rest on reporting, targets or previews rather than confirmed commercial outcomes. Samsung declined to comment on custom HBM. Besi's flat Q4 guidance sits alongside its strong orders. Terafab's 2028 target is a plan by two companies with no fab experience. The earnings have not been reported. That is not a weakness in the coverage — it is an accurate description of where the semiconductor industry actually stands in late October 2026: the architecture is being decided before the execution is proven.
What would change the assessment. If Samsung and Intel both report improving foundry economics on October 29, the diversification case strengthens and TSMC's pricing power is partly checked. If SK hynix and Micron confirm the same TSMC base-die arrangement, custom HBM becomes the industry standard rather than an Nvidia-specific arrangement. If Besi converts its order backlog into HBM production revenue in the next two quarters, hybrid bonding becomes a genuine bottleneck technology rather than a promising one.
Conversely, if the October 29 results disappoint and Terafab slips beyond 2028, the industry converges on a single-source model for advanced AI silicon that is more concentrated than it was a year ago — even as billions are spent nominally to diversify it. That is the paradox enterprise buyers should plan for: capital is pouring into geographic diversification while technical dependence on a handful of players is deepening.
The CODEW Research Flywheel
Semiconductor Watch tracks the chips, memory, packaging and manufacturing capacity that AI depends on. It sits alongside the other Watch series and feeds into the deeper CODEW research architecture:
| Product | Core Question |
|---|---|
| Semiconductor Watch | AI chips, advanced memory, foundries, equipment, packaging and global chip supply chains |
| Networking Watch | Optical transport, AI data-center fabric and interconnect |
| Hardware Watch | Servers, switches, optics and computing hardware built on chips |
| Storage & Data Management Watch | Memory, HDD, SSD and enterprise data infrastructure |
| AI Infrastructure Special Report | Data centers, compute, power and the physical infrastructure of AI |
| Company Analysis / Company Deep Dive | Persistent reference on Nvidia, TSMC, Samsung, SK hynix, Micron and Besi |
Semiconductor Watch → HBM and memory → Advanced packaging → Foundries → Equipment → Supply chain → AI Infrastructure → Networking Watch / Hardware Watch / Storage & Data Management Watch
The CODEW Stat
96% — the year-over-year increase in Besi's Q3 2026 order intake, which reached €342.6 million against a €298 million consensus. It is the number that best captures where the AI semiconductor bottleneck is moving. Besi does not make chips, memory, or lithography systems. It makes the equipment that joins stacked dies together. Orders for those systems nearly doubled in a year while hybrid bonding bookings more than doubled against all of 2025, and yet the company guided Q4 revenue flat because customers' production lines are not ready. That gap — between extraordinary order growth and flat near-term revenue — is the semiconductor industry's defining tension in late 2026. Demand for the next generation of AI chips is not limited by whether customers want them. It is limited by how quickly the manufacturing and packaging infrastructure can be brought online.
Sources: Samsung Electronics 3Q 2026 earnings notice (RNS); Intel Q3 2026 earnings announcement; BE Semiconductor Industries Q3 2026 results; Samsung Electronics investor relations; Singapore Economic Development Board; A*STAR; Advanced Substrate Technologies. Independent reporting: Reuters, Taiwan News, 36Kr, First Financial, Digital Today, TechNews, Seoul Economic Daily, The Edge Malaysia, Yahoo Finance, EET China, The Business Times, Anue, TTV, CNBC TV18, Investegate, TipRanks, Invezz, ChainCatcher, TradingView. Coverage window: October 18–27, 2026.
All factual claims regarding announcements, financial figures, product availability, and manufacturing plans are drawn from company disclosures and contemporaneous reporting. Editorial analysis is clearly distinguished from reported facts throughout. The custom NVHBM arrangement is reported and has not been confirmed by Samsung, which declined to comment; it should be treated as reported pending company confirmation. Terafab production targets are planning targets, not evidence of production capability, and ASML has not confirmed expedited deliveries. Samsung and Intel Q3 2026 results have not been released; analyst consensus figures are not company guidance. This edition combines one story reported on October 27 with developments from October 18–26 and an upcoming earnings event on October 29; it is not a claim that every development broke on October 27. This series does not provide investment advice.
Reviewed by Erwin Castro
on
Tuesday, October 27, 2026
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