The HBM Capital Race: Why AI Memory Is Attracting Strategic Investment
Executive Intelligence Series · The Term Sheet | September 26, 2026
SK hynix, Samsung, and Micron Technology have committed more than $100 billion in combined HBM capital expenditure for 2026 alone. South Korea has pledged $518 billion alongside its memory champions. HBM4 prices are projected to rise 65%. This analysis examines the strategic logic behind the HBM capital race and asks whether the money flowing into AI memory represents a temporary response to shortage — or a structural reallocation of capital toward memory as a critical layer of computing.
High Bandwidth Memory has become the defining constraint on AI infrastructure. UBS estimates that of the nearly $1 trillion in global AI capital expenditure projected for 2026, 90% of the incremental increase is attributable to memory costs—DRAM and HBM pricing, not broader infrastructure expansion. Memory represented approximately 14% of total AI capex in 2025. By 2026, that share reaches 37%. By 2027, it is projected to reach 64%.
The strategic question is not how much money is being invested. It is whether that capital is buying capacity, technology leadership, or strategic control — and whether the memory industry can invest aggressively enough to capture AI demand without recreating a traditional oversupply cycle.
1. Why HBM Has Become a Capital Story
HBM is not a faster version of standard memory. It is a fundamentally different product. Where conventional DRAM communicates through a 64-bit interface, HBM4 doubles that to 2,048 bits, delivering bandwidth exceeding 2 terabytes per second. It achieves this by stacking multiple DRAM dies vertically and connecting them through thousands of through-silicon vias, then packaging the stack directly alongside the GPU or accelerator.
The manufacturing consequences are severe. Producing one HBM chip consumes roughly three times the wafer area of a standard DRAM chip. Every HBM stack manufactured effectively displaces three standard memory chips that were never made. Standard DRAM lead times have extended beyond 40 weeks. DRAM contract prices increased 58% to 63% quarter-on-quarter in Q2 2026.
The demand side compounds the problem. A single advanced AI server requires several times the DRAM of a standard server, and each Nvidia Blackwell accelerator package contains eight HBM modules. Hyperscalers are buying these systems by the tens of thousands, absorbing a disproportionate share of global DRAM output.
HBM Demand & Pricing · 2026–2027
Memory share of AI capex (2025): 14%
Memory share of AI capex (2026): 37%
Memory share of AI capex (2027, projected): 64%
HBM demand growth 2026: 90%
HBM demand growth 2027: 77%
HBM4 price increase 2027: ~65%
The CODEW Lens: For the first time in the memory industry's history, suppliers hold pricing power over the largest technology companies in the world. That imbalance is the capital story.
2. Follow the Capital
Capital in the HBM ecosystem is flowing across six categories, each with a different strategic purpose.
Manufacturing capacity — The largest category by far. SK hynix is constructing a semiconductor cluster in Yongin, South Korea, expected to cost over $94 billion when fully built out by 2047. Samsung is ramping up its Pyeongtaek campus while building a $17 billion fab in Taylor, Texas. Micron is expanding leading-edge DRAM production in Idaho and New York.
Advanced packaging — SK hynix approved a $13 billion investment in P&T7, the world's largest HBM packaging facility, in Cheongju, plus a $3.87 billion advanced packaging site in West Lafayette, Indiana. Micron is investing $7 billion in HBM packaging in Singapore.
R&D and process technology — The transition to HBM4 requires new base-die architectures, hybrid bonding techniques, and advanced thermal management. SK hynix is developing high-bandwidth flash as a next-generation technology beyond HBM.
Equipment — SK hynix's 2026 wafer fab equipment spending is projected at $18 billion, up 62% year over year, rising to $26 billion in 2027.
Strategic partnerships and joint ventures — SK hynix and Nvidia have established a multi-year technology partnership to co-develop next-generation AI memory. Samsung is leveraging its vertically integrated structure — memory, foundry, and advanced packaging — to optimize HBM4 processes internally.
Customer-backed capacity — Micron signed its first-ever five-year customer supply agreement in 2026, replacing traditional one-year contracts with binding capacity and supply commitments.
The CODEW Lens: The categories are not equivalent. Manufacturing capacity manages cyclicality. Customer-backed agreements de-risk demand. Government support socializes risk. Each structure accomplishes something different.
3. The Three HBM Giants
Only three companies in the world can manufacture HBM at scale. Each is pursuing a distinct capital strategy — and none can be ranked by a single metric.
SK hynix — Defending the Lead. The market leader by revenue share (~50% as of Q2 2026). Its capital program is the most aggressive in the industry: a 600 trillion won ($430 billion) Yongin cluster, a 400 trillion won Honam cluster, a 100 trillion won Cheongju fab, and a 5.4 trillion won Indiana fab. SK hynix has begun mass production of 12-layer HBM4 for Nvidia's Vera Rubin platform and is expected to supply approximately 60% of Nvidia's HBM4 demand. Its M15X fab is being fast-tracked, with wafer input planned to expand from 10,000 sheets per month to 80,000.
Samsung — The Comeback. Began HBM4 mass production in February 2026 using its sixth-generation 1c DRAM and a 4-nanometer base die. Yield has climbed from below 60% to approximately 80%. The company plans to roughly double HBM4 output in 2027, increasing wafer input from 180,000 sheets per month to 250,000. Samsung's HBM revenue share rose from 21% in Q1 2026 to 33% in Q2 — narrowing the gap with SK hynix from 37 percentage points to 17.
Micron — The U.S. Challenger. Fiscal 2026 capex is expected to be above $25 billion, with full-year spending possibly reaching $27 billion. Fiscal 2027 capex is projected to step up meaningfully. Micron plans up to $200 billion through 2030 to expand U.S. memory capacity. Its HBM4 products, designed for Nvidia's Vera Rubin platform, are already in mass shipment ahead of schedule, and all of its planned HBM output for 2026 is allocated to customers.
HBM Revenue Share · Q1–Q2 2026
SK hynix Q2 2026: ~50%
Samsung Q1 2026: 21%
Samsung Q2 2026: 33%
Micron Q2 2026: ~18%
Samsung gap to SK hynix: 37 pts → 17 pts
The CODEW Lens: SK hynix leads on technology and Nvidia qualification. Samsung leads on vertical integration and total capacity. Micron leads on customer-backed contracts and U.S. supply-chain positioning. No single company controls all sources of advantage.
4. Nvidia's Strategic Role
Nvidia is not simply a customer of the HBM industry. It is the demand signal that determines whether capital investments generate returns.
In 2026, Nvidia accounts for approximately 58% of global HBM demand. That concentration gives the company extraordinary influence over memory supplier roadmaps, qualification timelines, and pricing negotiations. When Nvidia accelerates a platform launch, memory suppliers reallocate capacity. When Nvidia simplifies quality verification to speed delivery — as it did to accelerate SK hynix's HBM4 mass production for Vera Rubin — the entire supply chain adjusts.
The concentration is expected to decline. By 2027, custom ASIC demand from hyperscalers is projected to rise to 48% of HBM consumption, surpassing Nvidia's 43% share. ASIC shipments are forecast to grow 102% year over year, compared with 15% for Nvidia. Google's TPUs, Amazon's Trainium, and Microsoft's Maia accelerators are all increasing their HBM content per chip. But Nvidia's single-chip HBM loading remains higher than ASIC equivalents, preserving its position as the premium customer for leading-edge HBM4.
The CODEW Lens: HBM suppliers that secure Nvidia qualification for leading-edge nodes gain a reference customer that validates their technology for the broader market. That qualification is not a line item — it is the gate to the entire AI memory market.
5. Hyperscalers Enter the Capital Equation
The four largest hyperscalers — Amazon, Microsoft, Google, and Meta — are expected to increase AI infrastructure spending by 36% year over year to $527 billion in 2026. Goldman Sachs estimates that five hyperscalers, including Oracle, will invest $1.15 trillion in AI data centers and cloud infrastructure over 2025–2027. Morgan Stanley projects that global cloud capital expenditure will reach $1.2 trillion in 2027, with storage — including HBM — accounting for more than half.
RBC estimates that data center memory spending across the top ten hyperscalers will jump from approximately $107 billion in 2025 to roughly $237 billion in 2026. That spending flows first to Nvidia and AMD as accelerator purchases, then to Samsung, SK hynix, and Micron as memory orders.
Hyperscalers do not purchase HBM directly, but they influence capacity planning indirectly. Their capex commitments determine how many accelerators will be ordered. Their platform roadmaps determine ASIC HBM demand. And their willingness to sign long-term supply agreements provides memory manufacturers with the revenue visibility needed to justify multi-billion-dollar fab investments.
Hyperscaler AI Capex · 2025–2027
Big 5 hyperscaler AI capex 2026: $527B
Goldman Sachs 3-year forecast (5 firms): $1.15T
Morgan Stanley 2027 cloud capex: $1.2T
Top-10 hyperscaler memory spending 2025: $107B
Top-10 hyperscaler memory spending 2026: ~$237B
The CODEW Lens: Hyperscalers do not buy HBM. But their capex decisions — and their willingness to commit to multi-year supply — determine how much HBM capital gets deployed. Their balance sheets are the revenue visibility that justifies the fab.
6. Why HBM Requires So Much Capital
HBM is among the most capital-intensive products in the semiconductor industry. The reasons are structural.
Manufacturing complexity — HBM requires stacking multiple DRAM dies vertically, thinning each wafer to microscopic thickness, forming thousands of through-silicon vias, and bonding the stack with precise alignment. Each step introduces yield risk. Samsung's HBM4 yield rate remained below 60% during early mass production before improving to around 80%.
Advanced packaging — The 2.5D and 3D stacking processes used to integrate HBM with GPUs require specialized facilities, equipment, and expertise. SK hynix's P&T7 facility is designed to double the company's packaging capacity. Micron's Singapore packaging investment reflects the same priority.
Cleanroom capacity — DRAM cleanroom capacity remains limited. Only Samsung and SK hynix are able to expand production lines incrementally; Micron is waiting for its ID1 fab in the United States, which is not expected to become operational before 2027.
Equipment — HBM production requires wafer thinners, thermocompression bonders, and advanced metrology tools. SK hynix's wafer fab equipment spending is projected at $18 billion in 2026, up 62% year over year.
R&D and qualification — HBM4 introduces semi-custom logic dies, requiring memory vendors to collaborate with foundries like TSMC on base-die manufacturing. Qualification cycles are long, and customer concentration means that a single failed qualification can delay revenue recognition by quarters.
Time — Capacity expansion takes 18 to 24 months. The capacity being committed today will not produce chips until 2027 at the earliest, and in large volumes not until 2028.
The CODEW Lens: The capital intensity is not a bug. It is the barrier. Three companies can fund HBM capacity at scale. No new entrant can match their cost of capital or their accumulated process expertise.
7. Strategic Capital vs. Traditional Semiconductor Capex
The Term Sheet distinction is not between how much is being invested but what structure that investment takes. Each structure accomplishes something different strategically.
| Structure | Strategic Purpose | Example |
|---|---|---|
| Ordinary Capacity Expansion | Adds production lines for existing products; reversible; timed to demand cycles | Historical memory capex |
| Strategic Investment | Commits capital to new technology nodes before demand is proven | SK hynix $15.1B M15X |
| Customer-Backed Investment | Ties capital to specific customer commitments; converts spot revenue into contracted revenue. | Micron five-year supply agreement |
| Long-Term Supply Agreement | Provides revenue visibility without direct capital commitment | SK hynix 2027 HBM4 pricing with Nvidia |
| Joint Ventures & Partnerships | Shares risk and accelerates development | SK hynix–Nvidia multi-year technology partnership |
| Government-Supported Investment | Changes the risk calculus; socializes national industrial policy | South Korea $518B commitment |
| Vertical Integration | Reduces reliance on external suppliers; captures margin | Samsung in-house 4nm base die |
The CODEW Lens: The HBM capital race involves all seven structures simultaneously — which is why the total figures are so large and why the strategic implications extend far beyond memory.
8. The HBM Supply Chain as a Strategic Asset
DRAM → HBM → Packaging → Accelerators → Servers → Data Centers
Capital requirements increase at each stage, but leverage concentrates at the packaging step. DRAM fabrication is capital-intensive but increasingly commoditized at the leading edge. HBM stacking requires specialized equipment and process expertise that only three companies possess. Advanced packaging — the 2.5D and 3D integration of HBM with GPUs — is the narrowest bottleneck in the chain.
SK hynix's P&T7 facility, Micron's Singapore packaging investment, and Samsung's internal packaging capabilities all target this constraint. Companies that can scale packaging capacity and deliver reliable HBM supply gain leverage over accelerator manufacturers, who in turn gain leverage over hyperscalers. The bottleneck has shifted from fabrication to integration.
The weakest link in the U.S. supply chain is precisely this packaging step. SK hynix's Indiana facility, which handles 2.5D/3D stacking and interposer work on wafers shipped from Korea, is an attempt to close that gap. Until it is operational, U.S. HBM supply depends on Korean packaging capacity.
The CODEW Lens: Fabrication is scale. Packaging is leverage. The companies that own packaging capacity own the integration step that turns memory into accelerators.
9. The HBM4 Capital Race
HBM4 represents the most significant architectural shift in memory technology in a decade. It doubles the interface width to 2,048 bits, introduces semi-custom logic dies manufactured on foundry processes, and requires advanced thermal management for 12-layer and 16-layer stacks.
The capital requirements are correspondingly higher. HBM4's larger die size reduces the number of chips per wafer. The 4-nanometer and 12-nanometer base dies require foundry capacity that memory manufacturers must either build or contract. The advanced packaging required for 16-layer stacks — advanced MR-MUF technology, hybrid bonding — is more complex than previous generations.
HBM4 · Key Numbers
Interface width: 2,048 bits
Peak transfer rate: 13 Gbps per pin
Total bandwidth per stack: 3.3 TB/s
Capacity (16-high): 48 GB
2027 demand growth: 56%
2027 supply growth: 50%
Price increase 2027: ~65%
Industry forecasts project HBM4 prices approximately 65% higher than 2026 levels. Demand growth for HBM in 2027 is forecast at 56%, above the projected supply growth rate of 50%. Major customers including Nvidia and AMD are increasing the amount of HBM per chip as they launch next-generation accelerators.
The CODEW Lens: The HBM4 capital race is not simply an expansion of existing capacity. It is a technology transition that requires new equipment, new process flows, new packaging facilities, and new customer qualifications. Companies that complete the transition first gain a multi-year advantage.
10. The Risk of Overinvestment
The bear case is not that AI demand will disappear. It is that the memory industry's historical cyclicality will reassert itself.
AI demand slowdown — Hyperscaler capex-to-EBITDA ratios have already exceeded 70% in 2026. If AI infrastructure spending plateaus, the demand signal that justifies current HBM capacity commitments weakens.
Memory oversupply — Morningstar analyst Jing Jie Yu warns that "accelerating capex over the next decade further increases the risk of an oversupply longer term." Former SEC Chair Gary Gensler has said memory suppliers will eventually "lose what's called pricing power" as shortages ease.
Rapid technology transitions — The transition from HBM3E to HBM4 required new equipment and new process flows. The transition from 2.5D to 3D packaging will require another set of investments.
Customer concentration — Nvidia's 58% share of HBM demand means that a single customer's capex revision can ripple through the entire supply chain.
Capital intensity — HBM production requires more capital per unit of output than commodity DRAM. The payback period is longer, and the equipment is specialized.
Competitive catch-up — Samsung's yield improvements and revenue share gains show that the gap between SK hynix and its competitors is narrowing.
Alternative memory technologies — High-bandwidth flash, magnetic RAM, and resistive RAM could eventually reduce dependence on HBM.
Capacity Timing Mismatch
SK hynix Yongin cluster begins operations: 2027
Micron Idaho fab wafer output: mid-2027
Micron New York fab supply: 2030
Samsung Pyeongtaek expansion: through 2030
Current supply-demand gap: double digits
The CODEW Lens: Much of the capacity being committed today will not produce chips until the window of acute shortage has potentially closed. The timing mismatch is the single largest risk in the HBM capital cycle.
11. Who Gains Strategic Leverage From the Capital?
The HBM capital race is redistributing bargaining power across the AI infrastructure stack.
Memory manufacturers — Supply constraints have given Samsung, SK hynix, and Micron pricing power they have not enjoyed in decades. HBM4 prices are projected to rise 65% in 2027.
AI chip companies — Nvidia's 58% share of HBM demand gives it negotiating power. As ASIC demand rises, that power disperses across more customers.
Hyperscalers — Their willingness to sign long-term agreements provides the revenue visibility that justifies memory capex. Their ability to shift between Nvidia GPUs and in-house ASICs gives them optionality.
Equipment suppliers — Wafer thinners, bonders, and metrology tools are required for HBM production at every facility.
Packaging providers — Gain leverage as the bottleneck shifts from fabrication to integration.
Data-center operators — Absorb higher memory costs passed through in server and cloud pricing. Memory accounts for 73% of CPU server costs, 41% of laptop costs, and 39% of smartphone costs.
Investors — South Korea's stock market has surged nearly 96% year-to-date, driven almost entirely by Samsung and SK hynix. When retail participation reaches scale, the easy money has often already been made.
The CODEW Lens: The capital is not buying equal leverage for every participant. Memory manufacturers hold leverage today. Whether they sustain it depends on how quickly supply catches demand.
The Closing Question
Is the HBM investment cycle a temporary response to AI demand — or the beginning of a structural reallocation of capital toward memory as a critical layer of computing?
The evidence supports both conclusions. It is a temporary response because the capacity being built answers a shortage that may not persist. It is structural because AI workloads are memory-bound by design, and because governments have intervened at a scale unprecedented in memory history — treating HBM capacity as national infrastructure rather than private industrial investment.
The Term Sheet framework resolves the tension: the capital is buying strategic position, not just capacity. SK hynix is buying technology leadership and Nvidia qualification. Samsung is buying a comeback in a market it once led. Micron is buying a U.S. manufacturing base and contracted revenue. South Korea is buying national industrial policy.
Whether that structure proves durable depends on whether AI demand growth continues to outpace supply growth. For now, it does. HBM demand is forecast to grow 56% in 2027 against 50% supply growth. JPMorgan projects a 63% compound annual growth rate through 2028. If those forecasts hold, the capacity being built will be absorbed. If they do not, the industry faces its most expensive oversupply cycle.
The CODEW Lens: The capital is not simply responding to demand. It is shaping the structure of the AI memory supply chain for the next decade — and the companies that control memory now control the pace at which AI can scale.
The HBM Capital Commitments
| Company / Program | Capital Commitment | Strategic Purpose |
|---|---|---|
| South Korea + Samsung + SK hynix | $518B (800 trillion won) | Four new memory fabs + HBM packaging hub; national industrial policy |
| SK hynix — Yongin cluster | $430B (600 trillion won) | Largest single memory fab cluster in history; HBM4 capacity |
| SK hynix — P&T7 packaging | $13B | World's largest HBM packaging facility; doubles packaging capacity |
| SK hynix — Indiana packaging | $3.87B | First U.S. HBM advanced packaging facility |
| SK hynix — M15X fab | $15.1B | HBM4 capacity at scale; wafer input 10K → 80K/month |
| Micron — U.S. investment | $200B through 2030 | U.S. memory manufacturing base; Idaho + New York fabs |
| Micron — FY2026 capex | $25B–$27B | HBM4 ramp; 12Hi capacity; contracted revenue |
| Micron — Singapore packaging | $7B | HBM packaging capacity in Asia |
| Samsung — Taylor, Texas | $17B | U.S. fab for leading-edge memory and foundry |
| Samsung + SK hynix — Joint 2026 capex | $100B+ | Combined HBM capital expenditure for 2026 |
The CODEW Lens: The table shows a pattern, not a ranking. Every commitment is tied to a specific strategic objective — technology leadership, capacity scale, customer qualification, or national industrial policy.
The HBM Capital Glossary
HBM (High Bandwidth Memory) — A memory architecture that stacks multiple DRAM dies vertically and connects them through through-silicon vias, delivering bandwidth far exceeding conventional DRAM.
HBM4 — The fourth generation of HBM, doubling the interface to 2,048 bits and introducing semi-custom logic dies manufactured on foundry processes.
TSV (Through-Silicon Via) — A vertical electrical connection passing through a silicon die. Thousands of TSVs connect each HBM stack.
Advanced Packaging — The 2.5D and 3D integration of HBM with GPUs on a silicon interposer. The narrowest bottleneck in the HBM supply chain.
CoWoS — TSMC's Chip-on-Wafer-on-Substrate packaging technology, the industry standard for 2.5D integration of HBM with accelerators.
Customer-Backed Capacity — A financing structure in which a memory manufacturer commits capacity in exchange for multi-year customer supply commitments.
JEDEC Standard — The industry specification body for memory. HBM4 JEDEC standard bandwidth is 8 Gbps per pin; Nvidia's Vera Rubin requires higher speeds.
MR-MUF — Advanced packaging technology used in HBM stacking; more complex for 16-layer configurations.
Hybrid Bonding — Direct copper-to-copper connections between dies without solder bumps; enables higher stacking densities and better thermal performance.
ASIC HBM Demand — HBM consumed by hyperscaler-designed custom accelerators (Google TPU, Amazon Trainium, Microsoft Maia) rather than Nvidia GPUs.
Memory Cycle — The historical boom-and-bust pattern of the DRAM industry, driven by capacity additions outrunning demand growth.
FAQ
Q: How much is being invested in HBM capacity?
Samsung and SK hynix have committed more than $100 billion in combined 2026 HBM capex. South Korea has pledged $518 billion alongside its memory champions. SK hynix alone is building a $430 billion cluster in Yongin. Micron plans up to $200 billion through 2030.
Q: Why is memory taking a larger share of AI capex?
AI workloads are memory-bound by design. Model performance scales with memory bandwidth and capacity. Training requires loading billions of parameters. Inference requires reading those parameters and storing key-value caches. Agentic AI multiplies the memory footprint per user interaction. Memory represents 37% of AI capex in 2026, up from 14% in 2025, and is projected to reach 64% by 2027.
Q: Who are the major HBM suppliers?
Only three companies manufacture HBM at scale: SK hynix (~50% revenue share), Samsung (~33%), and Micron (~18%). SK hynix leads on technology and Nvidia qualification. Samsung leads on vertical integration and total capacity. Micron leads on customer-backed contracts and U.S. supply-chain positioning.
Q: What is the risk of overinvestment?
Memory has always been cyclical. The capital being committed today will produce capacity that must be absorbed. If AI demand growth slows before that capacity ramps, the industry faces a downturn. Morningstar warns that "accelerating capex over the next decade further increases the risk of an oversupply longer term." The timing mismatch between demand growth and capacity availability is the defining risk.
Q: Is the HBM capital race structural or temporary?
Both. It is a temporary response to acute shortage — capacity being built to meet demand that currently exceeds supply. But it is also the beginning of a structural reallocation of capital toward memory as a critical layer of computing. The capital is buying strategic position, not just capacity.
The CODEW Stat
$518B commitment · $100B+ 2026 capex · 90% of incremental AI spend South Korea, Samsung, and SK hynix have jointly committed $518 billion to build four new memory fabs and an HBM packaging hub — the largest single capital commitment in the history of the memory industry. Combined with Micron's $200 billion U.S. investment plan and SK hynix's $430 billion Yongin cluster, the HBM capital race represents a structural reallocation of capital toward memory as a critical layer of computing.
Reviewed by Erwin Castro
on
Saturday, September 26, 2026
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