Semiconductor Watch: Qualcomm's $4 Billion AWS Alliance, Broadcom's Custom Silicon Momentum, Nvidia's Grace Blackwell Shipments

Written by Erwin Castro — Founder & Editor, The CODEW
Semiconductor Watch | September 14, 2026

The AI Chip Race Moves Beyond GPUs


The Big Semiconductor Story

The AI Chip Race Moves Beyond GPUs

The semiconductor industry's AI narrative is undergoing its most significant structural shift since the GPU became synonymous with artificial intelligence. This week delivered three converging signals that the next phase of the AI chip market will be defined not by a single dominant processor architecture, but by a competitive ecosystem of accelerators, memory, packaging, and interconnect technologies.

Qualcomm and Amazon Web Services announced a multi-year, multi-billion-dollar alliance to co-develop custom AI inference semiconductors, with Qualcomm granting Amazon warrants tied to up to $60 billion in chip purchases over the next decade—a deal valued at approximately $4 billion if fully exercised. Broadcom reported AI semiconductor revenue of $16.7 billion, up 221% year-over-year, with custom XPUs for Google, Anthropic, OpenAI, and Meta driving the surge. And d-Matrix, a Silicon Valley inference chip startup, revealed that its next-generation Raptor XPUs will plug directly into Nvidia's rack-scale infrastructure using NVLink Fusion, with systems expected in 2027.

Read together, these developments point to a single conclusion: the AI chip race is no longer about who makes the fastest GPU. It is about who can assemble the most competitive combination of accelerators, HBM, advanced packaging, networking, and manufacturing capacity into complete AI systems. Nvidia remains dominant, but its moat is increasingly defined by interconnect standards and ecosystem lock-in rather than raw compute performance alone.

AI Chips & Compute

Qualcomm's $4 Billion AWS Alliance

Qualcomm's multi-year agreement with AWS represents the mobile chip giant's most significant push into the data center market. The partnership targets AI inference—the stage after model training—where Qualcomm will contribute low-power semiconductor design expertise built over decades in mobile, and AWS will provide AI infrastructure including Amazon Bedrock. The deal includes equity terms: Qualcomm granted Amazon warrants to purchase up to 25 million shares at $161.26 per share, tied to up to $60 billion in purchases over ten years.

This is Qualcomm's second hyperscaler win after Meta committed to its Dragonfly C1000 CPU. The company has set a fiscal 2029 data-center revenue target of $15 billion. CEO Cristiano Amon framed the strategy: "As AI demand accelerates, data center infrastructure needs advances on both compute and consolidation to deliver higher performance efficiently".

Broadcom's Custom Silicon Momentum

Broadcom's AI semiconductor revenue reached $16.7 billion in Q3 fiscal 2026, up 221% year-over-year and 54% sequentially. The company guided Q4 AI revenue to $21.7 billion—up 236% year-over-year—and projects fiscal 2027 AI revenue of roughly $115 billion and fiscal 2028 of $230 billion. CEO Hock Tan attributed the growth to "custom silicon orders building" from hyperscalers and AI labs. Broadcom's results underscore that the custom ASIC market is no longer a niche alternative to merchant GPUs—it is a primary growth driver for AI infrastructure.

d-Matrix and the Rise of Specialized Inference Silicon

The d-Matrix collaboration with Nvidia is a milestone in accelerator ecosystem evolution. The company's Raptor XPUs will integrate with Nvidia's MGX rack architecture via NVLink Fusion, connecting with Vera CPUs, NVLink switches, BlueField-4 DPUs, and Spectrum-X Ethernet networking. First compatible racks are expected in Q4 2027.

The strategic logic is twofold. For d-Matrix, NVLink Fusion provides a validated path to market without building a complete rack-scale system. For Nvidia, it ensures that even as the accelerator market fragments, the interconnect layer remains unified under its control. Raptor is purpose-built for ultra-low-latency inference—targeting AI coding assistants, chatbots, and voice agents—and uses a 3D DRAM stacking technology that integrates DRAM chips with SRAM compute dies in a dual-layer package.

Nvidia's Grace Blackwell Shipments Jump 27%

Nvidia CEO Jensen Huang disclosed that Grace Blackwell shipments—including Grace CPUs, Blackwell GPUs, and NVLink systems in 72-rack configurations—grew 27% month-over-month. Huang also confirmed that OpenAI's GPT-6 Astra was trained on approximately 100,000+ Grace Blackwell NVLink72 chips, and announced that 400,000 additional GPUs are scheduled to come online. The disclosures reinforce that demand for high-end AI compute remains unabated despite broader market volatility.

SEMIFIVE and Samsung's 4nm AI ASIC Milestone

Korean ASIC design service provider SEMIFIVE announced mass production of HyperAccel's "Bertha" data center AI inference accelerator on Samsung Foundry's 4nm process. The chip's die area exceeds 500 square millimeters—a large-die design that integrates more compute units and memory interfaces but poses greater challenges in power, thermal management, and yield.

The milestone matters for two reasons. First, it validates Samsung's 4nm process for large AI ASICs, not just mobile chips. Second, SEMIFIVE's mass production orders in the first half of 2026 reached 42.3 billion won—nearly double all of 2025—with overseas orders rising to 45% of the total, indicating that AI ASIC demand is expanding beyond a handful of cloud giants into diverse industries and regions.

Manufacturing & Foundries

TSMC's Record August Revenue

TSMC reported August consolidated revenue of NT$514.86 billion ($16.35 billion), up 53.3% year-over-year and 10.1% month-over-month—its fourth consecutive month of growth and a new monthly record. The company's 3nm capacity is projected to surpass 5nm for the first time in Q3 2026, with monthly 3nm wafer input expected to rise from 150,000 wafers in the first half to 180,000 wafers by Q4. TSMC's 2026 capital expenditure is set at a record $60–$64 billion.

Samsung's Taylor Fab: Fully Booked Before Production

Samsung's $37 billion Taylor, Texas, fab is reportedly fully booked for 2nm production before trial operations even begin. Customers include Tesla (AI5 chips), Broadcom (next-gen communications), and Arm (AI chips). Trial operations are expected in late September or early October, with mass production targeted for 2027. Samsung's 2nm yield has improved from approximately 60% at the start of the year to around 80%—a level sufficient for mass production.

Samsung and Mistral AI Partner on Semiconductor AI

Samsung Electronics entered a strategic partnership with French AI startup Mistral AI to develop customized AI models for semiconductor design and manufacturing. Samsung will integrate Mistral AI's services into its semiconductor operations for on-premises use, and has led Mistral AI's Series D funding round to secure a strategic equity stake. The collaboration targets chip design optimization, manufacturing process improvement, and engineering workflow automation.

Memory & Advanced Packaging

The HBM Shortage Intensifies

The global high-bandwidth memory shortage has become the defining bottleneck of the AI chip industry. Chinese AI chipmakers Huawei and Cambricon have sharply raised prices on current and next-generation accelerators because HBM costs have soared. Huawei's Ascend 950DT accelerator card is now quoted at above 250,000 yuan ($37,255)—a 20% to 50% increase from quotes given just two months ago. Cambricon has repriced its next-generation 690 chip 20–30% higher. Smaller rivals MetaX and Iluvatar CoreX have followed suit.

The root cause is structural: HBM accounts for a large share of an AI accelerator's production cost, and the advanced HBM market is dominated by SK Hynix, Samsung, and Micron. Since Washington tightened HBM export controls to China in December 2024, Chinese chipmakers have relied on grey-market channels, paying several times what buyers outside China pay.

Inventories Below 10 Days

KB Securities estimates that memory semiconductor inventories at Samsung Electronics and SK Hynix have fallen to less than 10 days' worth, raising concerns that available supplies could be depleted next year. The transition to HBM4—which requires roughly three times as much wafer production capacity as general-purpose DRAM—is a key factor exacerbating the shortage. KB Securities estimates DRAM and NAND bit demand will exceed supply by more than 10 percentage points.

Micron's HBM4 Ramp for Nvidia Vera Rubin

Micron Technology is accelerating production of 12-layer HBM4 for Nvidia's Vera Rubin platform, targeting a capacity share increase from 20–30% at the start of the year to as high as 50% by December. The company plans to nearly double HBM capacity to 100,000 wafers per month by year-end. Micron's HBM4 delivers more than 2.8 TB/s of bandwidth per stack with improved power efficiency.

Kepler Computing Emerges to Challenge HBM

Chip startup Kepler Computing ended seven years of stealth mode to announce a new memory architecture based on 3D stacking and proprietary ferroelectric materials that it claims can increase HBM and SRAM density without relying on EUV lithography. The company says its technology can be produced in existing fabs, avoiding the $20–$40 billion cost of building new memory wafer plants.

Kepler has raised $468 million, with backing from Intel Capital, AMD Ventures, Baillie Gifford, Gates Frontier, and GlobalFoundries (which invested $50 million and serves as a manufacturing partner). The U.S. Commerce Department committed up to $245 million in funding. Kepler has completed validation on approximately 2,000 wafers and plans to ship first HBM samples later this year, ramp production in Singapore in 2027, and start U.S. production in 2028.

SK Hynix and SanDisk Release HBF Standard

SK Hynix and SanDisk released the industry's first open standard for High-Bandwidth Flash (HBF), a new memory tier positioned between HBM and SSDs. HBF supports capacities up to 512GB with bandwidth grades ranging from 0.4 TB/s to 3.0 TB/s, using UCIe as the interconnect standard. Google and Tenstorrent are participating in the consortium.

Semiconductor Equipment

ASML's Triple Partnership with TSMC, Samsung, and Intel

ASML secured commitments from all three leading-edge chipmakers for its High-NA EUV lithography systems—machines costing approximately $400 million each. TSMC will adopt High-NA for high-volume manufacturing starting in 2030, Samsung by 2028, and Intel is already using the technology for its Panther Lake processors.

The four companies also agreed to transition from the current 6-inch photomasks to 12-inch versions, a shift that could increase throughput from High-NA machines by 40% while simplifying the design process. ASML CTO Marco Pieters described it as "a huge opportunity... a significant step in productivity". TSMC plans a 12-inch mask pilot line by 2031, with full production readiness by 2033.

Intel's High-NA EUV Milestone

Intel confirmed that High-NA EUV has been deployed in high-volume manufacturing, with over 1 million wafers processed. The company has been contributing to the push for larger photomasks for more than three years and says it is already able to offer the technology's benefits to prospective foundry customers. Intel's 14A process PDK 0.9 is expected in October 2026, with PDK 1.0 following later in the year—milestones that could trigger customer commitments from Apple, Nvidia, AMD, and others.

Imec Extends CAR Resists for High-NA

Imec demonstrated the extension of chemically amplified resists (CAR) for High-NA EUV lithography at the 2026 SPIE Photomask Technology + EUV Lithography Conference, marking continued progress in the materials ecosystem required for next-generation patterning.

Markets & Supply Chain

China's Anti-Dumping Measures Against Japan: China imposed preliminary anti-dumping measures on imports of dichlorosilane—a chemical used to process silicon wafers—from Japan, requiring importers to pay cash deposits of up to 99.2%. The move escalates a diplomatic dispute over Taiwan and follows Japan's plan to restrict exports of 23 semiconductor-related items. Japan's government has formally protested and requested withdrawal of the measures.

South Korea Tightens Export Controls: South Korea added high-performance AI chips and advanced semiconductor manufacturing equipment to its strategic items list, aligning with similar restrictions imposed by the U.S., EU, and Japan. The move reflects growing global coordination on semiconductor export controls, even as the Netherlands has pushed back against unilateral U.S. demands for alignment.

HBM Scarcity Reshapes Competitive Dynamics: The HBM shortage is creating a notable dynamic: Nvidia must share more of the economics of each AI server with memory, foundry, and packaging suppliers. Higher HBM costs can pressure GPU margins or increase system prices. Meanwhile, Micron benefits from unusually strong pricing power, while Chinese chipmakers face a structural disadvantage due to export controls.

Startups & Emerging Chips

SCI Semiconductor Raises £5M for Memory-Safe Chips

UK startup SCI Semiconductor raised £5 million to accelerate production of the ICENI chip, which embeds memory safety directly into computer architecture. The Sheffield-based company has secured more than £2 million in orders for its chips, which are designed to eliminate memory-related vulnerabilities at the hardware level.

Micro-LED Breakthrough

China's Qiushui Semiconductor released the world's first mass-production 8-inch red Micro-LED chip, which achieves 640×480 resolution in a 0.15 cubic centimeter volume, targeting AR glasses and near-eye display applications.

Kepler Computing's $468M Bet Against HBM Bottlenecks

Beyond its technical claims, Kepler Computing represents a significant bet that the memory shortage can be addressed through architecture and materials innovation rather than simply building more fabs. With backing from Intel, AMD, and GlobalFoundries—and U.S. government support—Kepler is positioning itself as a potential disruptor of the $100+ billion HBM market. However, scaling challenges remain: GlobalFoundries executives noted that Kepler's ferroelectric materials contain iron, a contaminant in semiconductor facilities that must be fully encapsulated or processed on dedicated equipment.

M&A & Strategic Moves

Analog Devices Acquires Alif Semiconductor for $1.35 Billion

Analog Devices (ADI) agreed to acquire Alif Semiconductor for $1.35 billion in cash, with up to $200 million in contingent consideration. Alif supplies low-power microcontrollers and fusion processors with integrated AI/ML acceleration. The acquisition expands ADI's addressable market in industrial, data center infrastructure, defense, energy, robotics, digital health, and wearable applications. The deal is expected to close in Q4 2026, subject to regulatory approval.

Samsung's Strategic Partnership with Mistral AI

Samsung's partnership with Mistral AI includes an equity investment in the French startup's Series D round, securing a strategic stake in exchange for long-term technology collaboration. The move reflects Samsung's strategy of integrating AI-native capabilities across its semiconductor operations.

Qualcomm–AWS: Equity-Linked Chip Deal

The Qualcomm–AWS agreement follows a pattern of equity-linked chip purchase deals that has become increasingly common in the AI industry. AMD granted OpenAI rights to acquire up to 10% of its equity based on chip purchase volume, and Marvell Technology provided Google with equity acquisition rights worth up to $12.2 billion. These structures align incentives between chipmakers and hyperscalers while providing chipmakers with long-term demand visibility.

Companies to Watch

Company Why It Matters This Week
TSMCRecord August revenue ($16.35B, +53.3% YoY); 3nm capacity surpassing 5nm for the first time; $60–$64B capex
SamsungTaylor fab fully booked for 2nm before production; Mistral AI partnership; 80% yield on 2nm
ASMLTriple partnership with TSMC, Samsung, and Intel for High-NA EUV; 12-inch photomask transition
Qualcomm$4B AWS alliance; warrants tied to $60B in chip purchases; $15B data center revenue target by 2029
Broadcom$16.7B AI revenue (+221% YoY); $21.7B Q4 guidance; $230B fiscal 2028 projection
MicronHBM4 ramp for Vera Rubin; capacity doubling to 100K wafers/month; 2.8 TB/s bandwidth per stack
d-MatrixRaptor XPUs integrating with Nvidia NVLink Fusion; first racks expected Q4 2027
Kepler Computing$468M raised; FeRAM-based HBM alternative; samples shipping later this year
SEMIFIVEMass production of HyperAccel AI inference ASIC on Samsung 4nm; orders nearly doubled
Analog Devices$1.35B acquisition of Alif Semiconductor for edge AI microcontrollers

The Semiconductor Signal

The semiconductor industry is transitioning from a GPU-centric AI market to a full-stack accelerator ecosystem. Three structural forces define this shift:

First, the accelerator market is fragmenting—but the interconnect layer is consolidating. d-Matrix's adoption of NVLink Fusion shows that specialized silicon can thrive alongside GPUs, but only within the interconnect and packaging frameworks that Nvidia controls. Broadcom's custom XPUs and Qualcomm's inference chips represent credible alternatives to Nvidia's merchant GPUs, but they still depend on the same memory, packaging, and foundry supply chains.

Second, memory has become the strategic bottleneck. HBM accounts for a large share of accelerator costs. Samsung and SK Hynix inventories are below 10 days. HBM4 consumes three times the wafer capacity of conventional DRAM. Chinese chipmakers are raising prices by 50% not because of design limitations but because they cannot secure enough memory. Kepler Computing's $468 million bet on FeRAM alternatives is a direct response to this bottleneck.

Third, manufacturing capacity—not chip design—is the binding constraint. TSMC is building 25 fabs and still cannot keep up. Samsung's Taylor fab is fully booked before production. ASML's High-NA EUV tools are essential for the next generation of AI chips, and all three leading-edge foundries have committed to adopting them. The 12-inch photomask transition, with its potential 40% productivity gain, is a coordinated industry response to the scale of demand.

The CODEW Take

The next phase of the semiconductor race will not be won by the fastest GPU alone. It will be determined by the ability to combine accelerators + HBM + advanced packaging + networking + manufacturing capacity + power efficiency into competitive AI systems—and by access to the scarce resources that make those systems possible.

This week's developments reinforce a broader thesis: semiconductors are no longer just a technology product category. They are strategic infrastructure. Qualcomm's $4 billion AWS alliance, Samsung's fully booked Texas fab, ASML's triple partnership with TSMC, Samsung, and Intel, and the HBM shortage that is reshaping competitive dynamics across the industry all point to the same conclusion.

The winners of the next technology cycle will be those who control the bottlenecks: memory, packaging, lithography, and the geopolitical relationships that determine access to critical materials. The losers will be those who assume that chip design alone is sufficient.

For technology leaders and investors: The AI semiconductor rally has broadened beyond Nvidia into memory (Micron, Samsung, SK Hynix), equipment (ASML, Applied Materials), and custom silicon (Broadcom, Qualcomm, d-Matrix). The companies that control scarce capacity—whether in HBM, CoWoS packaging, or High-NA EUV—will capture disproportionate value as the AI infrastructure buildout continues.

The CODEW Stat

Qualcomm granted Amazon warrants tied to up to $60 billion in chip purchases over ten years—the largest equity-linked chip deal of 2026—while TSMC's August revenue surged 53.3% to NT$514.8 billion, the clearest evidence yet that AI-driven semiconductor demand shows no signs of slowing.


Sources

  • Reuters — Qualcomm and AWS forge AI chip pact; China's AI chipmakers raise prices as HBM shortage bites; ASML to partner with major chipmakers
  • Samsung Newsroom — Samsung and Mistral AI Announce Strategic Partnership
  • WIRED — A Stealth Startup Thinks It Just Hacked the Memory Shortage
  • TrendForce — Samsung Taylor Fab Fully Booked for 2nm; Micron to Add 60K HBM Wafers
  • Barron's — TSMC Posts Record Sales
  • Taipei Times — ASML wins over TSMC, Samsung for EUV machines
  • Korea Herald — SEMIFIVE Commences Mass Production of HyperAccel's Bertha on Samsung 4nm
  • Economic Times — AI chipmaker d-Matrix to connect next-gen inference chips to Nvidia infrastructure
  • Reuters — Analog Devices to buy Alif Semiconductor for $1.35 billion
  • Yahoo Finance — AI's HBM Shortage Strengthens Micron's Hand
  • Various — SK Hynix/Sandisk HBF standard; Kepler Computing; China anti-dumping measures




Editorial Note

Semiconductor Watch tracks the companies, technologies, manufacturing capacity, supply chains, and geopolitical forces shaping the global semiconductor industry—and explains how the chip ecosystem is evolving as AI becomes a major driver of demand. Each edition connects design → IP → fabrication → equipment → memory → packaging → interconnect → data-center deployment → supply chain → geopolitics.


Semiconductor Watch: Qualcomm's $4 Billion AWS Alliance, Broadcom's Custom Silicon Momentum, Nvidia's Grace Blackwell Shipments Semiconductor Watch: Qualcomm's $4 Billion AWS Alliance, Broadcom's Custom Silicon Momentum, Nvidia's Grace Blackwell Shipments Reviewed by Erwin Castro on Monday, September 14, 2026 Rating: 5
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